2009년 11월 5일 목요일

Fix'y DSDT for ASUS P5W DH Deluxe and Snow & Leopard


First of all, thanks Peter314,

I just translated Peter314’s posting.

EDIT 12-10-2009:
Peter New DSDT v2.1 and LegacyHDA for ALC882:

3001___v2.1.zip ( 82.3K )
ALC882v10.kext.zip ( 8.77K )

EDIT 11-11-2009:
Peter update DSDT for P5W, for 2 and 4 CPU, based on 3001

EDIT 10-11-2009:

Bios Setting.
As my experience,

if Jmicron SATA/PATA controller is Enabled. No.1 Black Port, rounded Green Color, Above of Pic1.

SATA mode should be Basic(IDE) until 10.6.1.

After update to 10.6.2, it doesn’t matter Basic or AHCI.

But, Graphic Card is something missing as configured by OSX86 Tools.

I’ll correct Graphic Card Information.



No.2 is General SATA Port, No.3 is Backup Port.

EDIT 02-11-2009:
Added section to modify the LPC.
Removed section of the VGA due to not the best action.
Fixed all warnings when compiling, now DSDT Annex compiles the result of:
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 46 Optimizations

EDIT 22-09-2009:
I added the source and the DSDT compiled versions with added support for the ATI 4870 and without any VGA.
DSDT BIOS code is based on 2504.

Yesterday after the exhausting struggle with the DSDT of my album, and finally killed and surrendered … I managed to finally stabilize the operation of all components and I have a stable operating the USB and FireWire problems that they have done since version 10.5.6.
We managed to overcome in order to always operate all ports, they always operate under the High Speed USB 2.0, FireWire always work, no strange errors in the console of the FireWire and the EHCI / UHCI is loaded AppleHPET, AppleRTC, working properly Sleep, Restart, Shutdown, I refer impression of the system is not rising faster still, no kext in / S / L / E has not been removed, modified, or added … and for dessert, a cake of raisins to the acting got a wake-up from sleep mode when you click the mouse or keyboard … one sentence full of grazing …

And what needs to be done.
1. Upload BIOS version 2504 - later do not contain tables SSDT - note the bios does not support 45nm processors.
2. Pull the DSDT and make the following modifications:


:arrow: 1. HPET, RTC fix and stabilization of the USB and FW:

Original section HPET:

Code:
Device (HPET)
(
Name (_HID, EisaId ( “PNP0103”))
Name (CRS, ResourceTemplate ()
(
Memory32Fixed (ReadOnly,
0xFED00000, / / Address Base
0x00000400, / / Address Length
_Y09)
))
OperationRegion (HPTC, SystemMemory, HTBA, 0x04)
Field (HPTC, ByteAcc, NoLock, Preserve)
(
HPTS, 2,
, 5,
HPTE, 1,
Offset (0x04)
)

Method (_STA, 0, NotSerialized)
(
If (LEqual (OSFL (), Zero))
(
If (HPTE)
(
Return (0x0F)
)
)
Else
(
If (HPTE)
(
Return (0x0B)
)
)

Return (Zero)
)

Method (_CRS, 0, NotSerialized)
(
CreateDWordField (CRS, \ _SB.PCI0.SBRG.HPET._Y09._BAS, HPT)
Multiply (HPTS, 0x1000, Local0)
Add (Local0, 0xFED00000, HPT)
Return (CRS)
)
)

Modified:
Code:
Device (HPET)
(
Name (_HID, EisaId ( “PNP0103”))
Name (CRS, ResourceTemplate ()
(
IRQNoFlags ()
(0)
IRQNoFlags ()
(8)
Memory32Fixed (ReadOnly,
0xFED00000, / / Address Base
0x00000400, / / Address Length
_Y09)
))
OperationRegion (HPTC, SystemMemory, HTBA, 0x04)
Field (HPTC, ByteAcc, NoLock, Preserve)
(
HPTS, 2,
, 5,
HPTE, 1,
Offset (0x04)
)

Method (_STA, 0, NotSerialized)
(
If (LEqual (OSFL (), Zero))
(
If (HPTE)
(
Return (0x0F)
)
)
Else
(
If (HPTE)
(
Return (0x0B)
)
)

Return (Zero)
)

Method (_CRS, 0, NotSerialized)
(
CreateDWordField (CRS, \ _SB.PCI0.SBRG.HPET._Y09._BAS, HPT)
Multiply (HPTS, 0x1000, Local0)
Add (Local0, 0xFED00000, HPT)
Return (CRS)
)
)


Original section RTC0:
Code:
Device (RTC0)
(
Name (_HID, EisaId (PNP0B00 “))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0070, / / Range Minimum
0x0070, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
IRQNoFlags ()
(8)
))
)

Modified section RTC0:
Code:
Device (RTC0)
(
Name (_HID, EisaId (PNP0B00 “))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0070, / / Range Minimum
0x0070, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
))
)

Original section TMR:
Code:
Device (TMR)
(
Name (_HID, EisaId ( “PNP0100”))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0040, / / Range Minimum
0x0040, / / Range Maximum
0x00, / / Alignment
0x04, / / Length
)
IRQNoFlags ()
(0)
))
)

Modified section of TMR:
Code:
Device (TMR)
(
Name (_HID, EisaId ( “PNP0100”))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0040, / / Range Minimum
0x0040, / / Range Maximum
0x00, / / Alignment
0x04, / / Length
)
IO (Decode16,
0x0050, / / Range Minimum
0x0050, / / Range Maximum
0x01, / / Alignment
0x04, / / Length
)
))
)

Original section PIC:
Code:
Device (PIC)
(
Name (_HID, EisaId ( “PNP0000”))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0020, / / Range Minimum
0x0020, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
IO (Decode16,
0x00A0, / / Range Minimum
0x00A0, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
IRQNoFlags ()
(2)
))
)

Modified section of the PIC:
Code:
Device (PIC)
(
Name (_HID, EisaId ( “PNP0000”))
Name (_CRS, ResourceTemplate ()
(
IO (Decode16,
0x0020, / / Range Minimum
0x0020, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
IO (Decode16,
0x00A0, / / Range Minimum
0x00A0, / / Range Maximum
0x00, / / Alignment
0x02, / / Length
)
))
)


:arrow: 2. DTGP method:
It is required that everything that all other fixes using it would work.
It looks like this:
Code:
Method (DTGP, 5, NotSerialized)
(
If (LEqual (arg0, Buffer (0x10)
(
/ * 0000 * / 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,
/ * 0008 * / 0xb0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
)))
(
If (LEqual (Arg1, One))
(
If (LEqual (Arg2, Zero))
(
Store (Buffer (One)
(
0x03
), Arg4)
Return (One)
)

If (LEqual (Arg2, One))
(
Return (One)
)
)
)

Store (Buffer (One)
(
0x00
), Arg4)
Return (Zero)
)


and should be placed after the first opening parenthesis “(“
After placing the section should look something like this:
Code:

* OEM Revision 0x00000000 (0)
* Compiler ID “INTL”
* Compiler Version 0x20080926 (537397542)
* /
DefinitionBlock (dsdt.aml “,” DSDT “, 1,” A0543 “,” A0543000 “, 0x00000000)
(
Method (DTGP, 5, NotSerialized)
(
If (LEqual (arg0, Buffer (0x10)
(
/ * 0000 * / 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,
/ * 0008 * / 0xb0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
)))
(
If (LEqual (Arg1, One))
(
If (LEqual (Arg2, Zero))
(
Store (Buffer (One)
(
0x03
), Arg4)
Return (One)
)

If (LEqual (Arg2, One))
(
Return (One)
)
)
)

Store (Buffer (One)
(
0x00
), Arg4)
Return (Zero)
)

Scope (_PR)
(
Processor (CPU1, 0x01, 0x00000810, 0x06)


:arrow: 3. TM Fix:
This fix enables the Time Machine without having to apply any additional patches, and get rid of the error console: Error UUID: 35

The original section P0P7 (P P Zero 7) - the connector that is connected to Ethernet 1
Code:
Device (P0P7)
(
Name (_ADR, 0x001C0003)
Method (_PRW, 0, NotSerialized)
(
Return (GPRW (0x09, 0x04))
)

Method (_PRT, 0, NotSerialized)
(
If (PICM)
(
Return (AR07)
)

Return (PR07)
)
)



Modified section P0P7 (P P Zero 7)
Code:
Device (P0P7)
(
Name (_ADR, 0x001C0003)
Method (_PRW, 0, NotSerialized)
(
Return (GPRW (0x09, 0x04))
)

Method (_PRT, 0, NotSerialized)
(
If (PICM)
(
Return (AR07)
)

Return (PR07)
)

Device (LAN)
(
Name (_ADR, Zero)
Name (_PRW, Package (0x02)
(
0x0B,
0x04
))
Method (_DSM, 4, NotSerialized)
(
Store (Package (0x04)
(
“built-in”
Buffer (One)
(
0x01
)

“device_type”
Buffer (0x09)
(
“ethernet”
)
), Local0)
DTGP (arg0, arg1, arg2, Arg3, RefOf (Local0))
Return (Local0)
)
)
)


:arrow: 4. Mobilization of the LPC:
This fix is often needed to start working properly vanillowego energy management. On CD-asus’a LPC is usually hidden under the name SBRG. In addition, after starting the LPC shows an option to “restart automatically after a power failure in the panel on” Energy Efficient machine “

The original top section SBRG:
Code:
Device (SBRG)
(
Name (_ADR, 0x001F0000)
Method (SPTS, 1, NotSerialized)
(
Store (One, PS1S)
Store (One, PS1E)

Inserted Modified:
Code:
Device (SBRG)
(
Name (_ADR, 0x001F0000)
Method (_DSM, 4, NotSerialized)
(
Store (Package (0x02)
(
“device-id”,
Buffer (0x04)
(
0xb9, 0x27, 0x00, 0x00
)
), Local0)
DTGP (arg0, arg1, arg2, Arg3, RefOf (Local0))
Return (Local0)
)

Method (SPTS, 1, NotSerialized)
(
Store (One, PS1S)
Store (One, PS1E)


If someone does not want to, can not, can not register on the forum to download the modified DSDT.dsl the attachment is below the “extra” link to download.
Code:
http://rapidshare.com/files/301490070/DSDT_P5W_DH_Delux_Fix_-_HPET_IRQ_TM_LPC.zip


Unfortunately, some values in the DSDT are generated depending on what is the processor model.

The following values are changing in the Scope (_PR) depending on your CPU:
CODE
OperationRegion (Stbl, SystemMemory, 0x7FF8E0B0, 0x01C6) //different for each CPUx section
 
Name (NCPU, 0x04) // 0x02 for core 2 duo, 0x04 for core 2 quad.

Name (CFGD, 0x7FF80507) //different for each CPUx section

And that, just below the section _PR
CODE
OperationRegion (BIOS, SystemMemory, 0x7FF8E064, 0xFF)

Unfortunately, it follows that for each model, eg processor E6300, E6400, etc. should do yourself a DSDT dump for example, under Ubuntu and improve these values to those learned from the dump.

If these values are incorrect, sleep / shutdown / speedsteep stops working.

In the attachment to the post, fixed version of the DSDT for the Q6600.
, , , , ,
작성자: 시간:
라벨: , , , , ,

댓글 1개:

  1. merteous2010년 1월 10일 오후 9:47

    10.6.3 도 잘 돌아간다고 하더군요. 물론, 그래픽 카드도 Nvidia 계열은 기존방식으로 설정이 된다고도 합니다만,,,

    답글삭제

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